These are recorded results from a corrected five-pitch OpenEMS sweep. All five pitches use the same 0.127 mm (5 mil) ideal conducting post diameter. The metric-pitch cases, matching imperial-pitch cases and reference controls are traced to their original saved solver data. Publishing this viewer did not run new simulations.
The interactive OpenEMS field viewer adds magnetic-field slices at 1 and 20 MHz, with documented native-export verification and field-specific limits. These additional runs preserve the original coupling data.
| Centre pitch | Pitch (mm) | Via count | Pickup (µV/A) | Reduction (dB) | Pickup remaining |
|---|---|---|---|---|---|
| 8 mm | 8.000 | 3 | 12.92 | 2.6 | 74.0% |
| 4 mm | 4.000 | 5 | 9.76 | 5.0 | 55.9% |
| 2 mm | 2.000 | 9 | 8.27 | 6.5 | 47.4% |
| 20 mil | 0.508 | 33 | 6.97 | 8.0 | 40.0% |
| 10 mil | 0.254 | 65 | 6.88 | 8.1 | 39.4% |
The no-fence reference is 17.45 µV/A. Reduction means 20 log10(no-fence pickup / fenced pickup) at the same sinusoidal source-loop current. It is not normalized to DC load current. Positive dB means less pickup. These are quasi-static estimates extracted from a short broadband OpenEMS response, not fully converged direct 1 MHz measurements.
Every spacing retains coupling in this example. There is no pass/block threshold here. The 20 and 10 mil estimates both approach the continuous-wall reference (8.3 dB reduction). A wall from the bottom plane to the PCB surface still permits fields above it and around its ends.
The additional benefit of 10 mil over 20 mil is unresolved. It is 0.121 dB on the common base grid, 0.008 dB using complete finer-grid records, and 0.116 dB using matched finer-grid durations. Both finer pitch records exceed the final time-window targets; the finer 20 mil run reached its step cap. These differences do not establish a reliable advantage for 10 mil.
The example uses an 18 × 16 mm board, a 1.2 mm dielectric with relative permittivity 4.2, and a continuous bottom ground plane. Two top-layer current loops have 4.8 × 2.4 mm outer dimensions, 0.8 mm trace width, and centres 8 mm apart. The source loop represents a PSU switching-current loop; the other is a susceptible pickup loaded by 50 Ω. A 16.8 × 0.8 mm top ground guard, connected to the bottom plane by the via row, lies between them. The no-fence reference removes both guard and vias.
Pitch is centre to centre, with a via at x = 0. The 8, 4 and 2 mm rows have outer centres at ±8 mm; 20 and 10 mil rows have outer centres at ±8.128 mm. Thus this finite-board sweep holds the board, guard, loops, post diameter and mesh fixed, but has a 0.128 mm endpoint difference between metric and imperial rows. Exact nominal metric pitches are preserved; their centres do not all align with the Cartesian grid. Small-feature discretization remains a source of uncertainty.
OpenEMS uses solid perfect electric conductor posts, with no copper resistance, barrel plating, hollow holes, dielectric loss or manufacturing tolerances. Those idealizations can affect shielding and are particularly relevant when interpreting low-frequency currents. The KiCad boards have nominal 0.127 mm holes, 0.381 mm pads, 35 µm top/bottom copper and a 1.2 mm dielectric; the OpenEMS planar copper has zero thickness. These are related geometry representations, not a fabrication-exact KiCad extraction.
The experiment excludes noise conducted along supply traces or through shared ground impedance, an independently excited switch-node electric field, an inductor/core model, and a complete regulator waveform. It estimates coupling of a 1 MHz current component, not the full spectrum of a 1 MHz switching supply. For a real board, hot-loop size and the nearby return plane also matter; Analog Devices demonstrates these mechanisms in AN-139, Power Supply Layout and EMI.
The related editable KiCad coupons are not part of this public viewer package. Small-hole and minimum-via-diameter DRC violations were retained in the fenced coupons; the 10 mil coupon also retained hole-to-hole clearance violations. These are EM geometry coupons, not fabrication-approved boards. A fabricator-specific process, reviewed stackup and manufacturing checks are required before building a corresponding board. The ideal solid-conductor simulation does not establish manufacturability.
Z(f) = Vpickup(f) / Isource(f) is calculated from saved OpenEMS port traces. The source is a 0 Hz-centred Gaussian with a 4 GHz bandwidth parameter. The short response has a numerical DC offset, so raw 1 MHz magnitude is not used as the headline. Instead, fit Im(Z)/(2πf) = M + a(f/100 MHz)² over 10–30 MHz, then estimate 1 MHz pickup as 2π × 1 MHz × |M|. Raw complex spectra, alternative fit-band checks and record-truncation checks are retained.
The base mesh is identical across all seven comparison/reference cases: 603,520 volume cells, 0.0635 mm nominal row spacing in x/y and 0.4 mm main z spacing. This resolves the ideal diameter with only about two cells. The reused local refinement halves the row spacing, but does not refine every dimension. No separate refined metric-pitch runs were made in this correction. OpenEMS documents why tiny PCB features and very low frequencies are an expensive FDTD combination, and discusses extracting equivalent parameters at higher frequency as a workaround. OpenEMS mesh guidance.
The x = 0 PEC symmetry plane divides each 50 Ω port into a 25 Ω half port. Full pickup voltage is twice the half voltage; source-loop current is unchanged. The reused full-board no-fence solve differs by +0.00049 dB, checking this reconstruction. Outer boundaries use eight-cell PML.
| Case | Record (ns) | Fit-band sensitivity | Last 25% omitted | Last 10% omitted | Final window targets met? |
|---|---|---|---|---|---|
| 8mm_base | 2.056 | 9e-05% | 0.358% | 0.055% | Yes |
| 4mm_base | 2.181 | 0.00017% | 0.374% | 0.176% | Yes |
| 2mm_base | 2.119 | 0.00019% | 0.473% | 0.281% | No |
| none_base | 2.056 | 6.3e-05% | 0.127% | 0.065% | Yes |
| 20mil_base | 2.087 | 0.0001% | 0.277% | 0.013% | Yes |
| 10mil_base | 2.274 | 2e-05% | 0.341% | 0.303% | No |
| wall_base | 2.243 | 0.00014% | 0.509% | 0.025% | No |
| none_base_full | 2.056 | 6.1e-05% | 0.114% | 0.058% | Yes |
| none_refined | 2.059 | 3.5e-05% | 0.062% | 0.005% | Yes |
| 20mil_refined | 4.649 | 0.0087% | 0.772% | 0.244% | No |
| 10mil_refined | 2.902 | 0.00083% | 0.599% | 0.213% | No |
Fit-band sensitivity compares 3–10 and 31–60 MHz extrapolations against the 10–30 MHz fit. The window checks compare the imaginary 1 MHz transfer from truncated and full records. Targets are at least 2 ns, less than 0.5% change omitting the final 25%, and less than 0.2% omitting the final 10%. The monitor requests an orderly stop; the solver can advance before stopping, so the final record need not retain the trigger's stability. Stop evidence and logs are preserved. None of these runs is claimed to meet the requested −80 dB residual-energy threshold. The checks are sensitivity evidence, not a formal error bound.
The finer 20 mil run ended at 80,000 time steps without a metric-stop request. The finer 10 mil record also misses its final window targets. Matched-duration comparisons give 0.150 dB extra reduction on the base mesh and 0.116 dB on the finer mesh. The spread among these checks is comparable to the claimed small advantage, so no reliable 10-versus-20 mil distinction is inferred.